1. Field of the Invention
The present invention relates to a semiconductor device in which a MOS transistor is formed on a semiconductor film on an insulating film and, more particularly, to a semiconductor device in which a MOS transistor constituting a sensor amplifier or a boosting circuit of a DRAM is improved.
2. Description of the Related Art
High performance of a recent semiconductor integrated circuit in, especially, a silicon MOS transistor technique is considerably developed. In this silicon MOS transistor technique, it is known that a micropatterned, high-speed, and high-performance element can be realized by forming a MOS transistor on an SOI (Silicon-On-Insulator) film (to be referred to as an SOIxc2x7MOSFET hereinafter).
FIG. 1 is a plan view showing a layout pattern of a conventional sense amplifier using such an SOIxc2x7MOSFET, and FIGS. 2A and 2B are sectional views showing the conventional sense amplifiers along lines 2Axe2x80x942A and 2Bxe2x80x942B in FIG. 1, respectively.
FIG. 1 shows a sense amplifier SA, a bit line BL, a control line 1 for connecting a common source terminal of the sense amplifier SA, a source-contact portion 2, a drain-contact portion 3, and a gate-contact portion 4.
FIGS. 2A and 2B show a p-type monocrystal silicon film 7 as an SOI film. A silicon oxide film (SiO2 film) 6 is formed on the bottom and side surfaces of the p-type monocrystal silicon film 7. The silicon oxide film 6 on the bottom surface is an insulating film of an SOI substrate, and the silicon oxide film 6 on each side surface is an element isolation insulation film.
An n-type source region 8 and an n-type drain region 9 are selectively formed in the p-type monocrystal silicon film 7. A gate electrode 11 is arranged on the p-type monocrystal silicon film 7 in a channel region between the n-type source region 8 and the n-type drain region 9 through a gate oxide film 10.
In the SOIxc2x7MOSFET, due to a so-called substrate floating effect, problems such as a low drain breakdown voltage or an unstable drain current in a switching operation are posed.
In particular, in a flip-flop type sense amplifier used in a DRAM or the like or a current mirror type differential amplifier, when an n-type SOIxc2x7MOSFET is used in a potential difference detection unit, holes are stored in an SOIxc2x7MOSFET channel portion, and the threshold value of the SOIxc2x7MOSFET decreases. Since the decrease in threshold value depends on the number of stored holes, the decrease in threshold value depends on a transistor. For this reason, the threshold value is unbalanced, and detection sensitivity to a potential difference. When the decrease in threshold value is considerably large, an erroneous operation may be caused.
In a pump circuit constituting a boosting circuit or a lowering circuit, when a capacitor constituting a pump has first and second electrodes, and an SOIxc2x7MOSFET is used as a switching means for connecting the first electrode of the capacitor to an output, a decrease in drain breakdown voltage is caused by the substrate floating effect of the SOIxc2x7MOSFET.
For example, in the lowering circuit, when the first potential is boosted at a timing at which the potential of the second electrode is charged by a capacitor driver circuit, the SOIxc2x7MOSFET must be turned off. When an n-type SOIxc2x7MOSFET is used the above SOIxc2x7MOSFET, the potential of the first electrode serving as a drain is boosted, the capacity coupling between the drain and the substrate portion of the SOIxc2x7MOSFET boosts the potential of this substrate portion, and the cut-off characteristics of the SOIxc2x7MOSFET are degraded. In the worst case, drain breakdown is caused. In addition, holes generated by slight drain breakdown are stored for a reason except for the above capacity coupling, and drain breakdown is caused by the substrate floating effect.
Furthermore, although an accurate reference voltage generation circuit is required to use the reference voltage as a reference for checking whether an input signal is set to be xe2x80x9cHxe2x80x9d or xe2x80x9cLxe2x80x9d in a DRAM or the like, a bulk type pn diode used in a conventional DRAM or the like cannot be used in the SOIxc2x7MOSFET without increasing the number of steps (costs). Therefore, means for generating a stable reference potential without largely increasing the number of steps is desired.
As described above, since no contact with the substrate can be obtained in the semiconductor device using the conventional SOIxc2x7MOSFET, a substrate floating effect is disadvantageously caused. In particular, in sense amplifiers for amplifying a fine potential read out on a bit line pair, since the substrate potentials of two transistors constituting a pair of sense amplifiers are set in a floating state, the threshold values of the transistors are difference from each other, and an accurate sensing operation cannot be performed (subject matter 1). In addition to realization of the accurate sensing operation, high-density integration (subject matter 2), moderation of design rules (subject matter 3), and a countermeasure against noise (subject matter 4) must be realized.
Furthermore, in a pump circuit constituting a boosting circuit or a lowering circuit, the cut-off characteristics of an SOIxc2x7MOSFET are degraded, and drain breakdown is caused in the worst case (subject matter 5). In the SOIxc2x7MOSFET, a stable reference potential cannot be generated without largely increasing the number of steps (subject matter 6).
It is an object of the present invention to provide a semiconductor device which can prevent a substrate floating effect of an SOIxc2x7MOSFET to realize a highly reliable sense amplifier or the like and realizes high-density integration, moderation of design rules, and a reduction in noise.
Means for solving subject matter 1 is as follows. That is, a diffusion layer region of the same conductivity type as that of a substrate is formed in a common source region, or a portion of each drain region in a sense amplifier formed by an SOIxc2x7MOSFET to connect the substrates of a pair of transistors to each other, thereby making the potentials of the substrates equal to each other (arrangement 1-1). In order to make the above means further effective, a contact is formed in the common diffusion layer region to connect the common diffusion layer region to a power supply line or a signal line (arrangement 1-2).
According to arrangement 1 of the present invention, in a sense amplifier constituted by an SOIxc2x7MOSFET which detects and amplifies a micro-potential difference, the substrate potentials of a pair of transistors are equal to each other. For this reason, the threshold values of the transistors change in the same manner, and a potential difference can be accurately detected. For this reason, an erroneous sensing operation can be prevented.
In addition, since the contact with a substrate is formed, the substrate potentials are not set in a floating state, and problems such as storage of holes in a channel portion and a decrease in drain breakdown voltage are solved. Therefore, a highly reliable DRAM can be realized.
Means for solving subject matter 2 is that the substrate contact and a source contact are used common (arrangement 2-1), or that a p-type region is common to upper and lower (in a word line direction) sense amplifiers (arrangement 2-2).
According to arrangement 2, the substrate contact and the source contact are used common, a contact-contact interval is not required, and high-density integration can be obtained. When p-type regions are connected to each other in a word line direction, an implant-implant interval is not required, and high-density integration can be obtained. In addition, when p-type regions are connected to each other in a word line direction, the substrate potentials and threshold values of the sense amplifiers on pair of adjacent bits can be made equal to each other, and sensing operations can be started at the same timing. For this reason, a sense amplifier is not erroneously operated in reception of noise from an adjacent column.
Means for solving subject matter 3 employs an arrangement in which sense amplifiers are shifted from each other in a bit line direction (arrangement 3-1), an arrangement using a layout in which a through bit line is arranged and one sense amplifier is arranged every four bit lines (arrangement 3-2), or an arrangement in which a gate is vertically arranged (arrangement 3-3). When two p-type regions are formed in both the ends a gate polysilicon portion (arrangement 3-4), a layout strong to a shift in mask alignment of an implant can be obtained.
According to arrangement 3 of the present invention, when the sense amplifiers are shifted from each other in the bit line direction (lateral direction), and a layout in which one sense amplifier is arranged every four bit lines, design rules in the vertical direction can be moderated. When the gate polysilicon portion of a transistor is vertically arranged, a gate length L of the transistor can be increased, and variations in threshold value can be decreased. In addition, when two p-type regions are formed in both the ends of a gate polysilicon, a layout strong to a shift in mask alignment of an implant can be obtained.
Means for solving subject matter 4 is that bit lines cross each other (arrangement 4).
According to arrangement 4 of the present invention, when a pair of bit lines cross each other, noise generated by adjacent bit lines can be eliminated.
In addition to arrangements 1 to 4 described above, various combinations such as arrangements 1-1 and 2-2, arrangements 1-1 and 3-2, arrangements 1-1 and 2-2, arrangements 3-4 and, . . . , can be used. Therefore, the effects of these arrangements can be added to each other.
A means for solving subject matter 5 employs an arrangement in which an n-type (in case of a boosting circuit) or p-type (in case of a lowering circuit) SOIxc2x7MOSFET is used, the gate length of the SOIxc2x7MOSFET is set to be larger than the minimum gate length of an SOIxc2x7MOSFET constituting a circuit except for the boosting circuit or the lowering circuit, a semiconductor having a bandgap width smaller than a channel portion is formed in at least a portion of the source/drain region of the SOIxc2x7MOSFET constituting the boosting circuit or lowering circuit (arrangement 5).
Arrangement 5 comprises a pn diode using a junction between a p-type diffusion layer formed simultaneously with a portion of the source region of the SOIxc2x7MOSFET and consisting of the same material as that of the source region and a first n-type diffusion layer, and a pn diode using a junction between a p-type semiconductor having a bandgap width equal to that of the channel portion and the first n-type semiconductor. The difference between the threshold values of the two pn junction diodes is used as a reference potential.
According to arrangement 5 of the present invention, with respect to a boosting circuit, a capacitor performs discharge from the second electrode of the capacitor, and the potential of the first electrode is lowered, in the n-type SOIxc2x7MOSFET (M1) in which the first electrode and the output are connected to each other, the potential of the substrate portion of the SOIxc2x7MOSFET is lowered by capacity coupling between the substrate portion and the first electrode. For this reason, the cut-off characteristics change to be improved, and trigger which causes drain breakdown can be advantageously avoided. When the potential of the first electrode is lower than an output voltage, holes generated for some reasons such as slight drain breakdown are absorbed in a narrow bandgap semiconductor portion to suppress a substrate floating effect, thereby preventing drain breakdown. In addition, when the gate length of the SOIxc2x7MOSFET is increased, an electric field to be applied is moderated, and a drain breakdown voltage can be increased.
In a means for solving subject matter 6, the bandgap width of at least a portion of the source region of the SOIxc2x7MOSFET is smaller than that of the channel region, a first pn diode using a junction between a p-type diffusion layer formed simultaneously with a portion of the source region of the SOIxc2x7MOSFET and consisting of the same material as that of the source region and a first n-type diffusion layer, and a second pn diode using a junction between a p-type semiconductor having a bandgap width equal to that of the channel portion and the first n-type semiconductor are arranged (arrangement 6).
In arrangement 6, the SOIxc2x7MOSFET is an n-type SOIxc2x7MOSFET, and at least a pair of n-type SOIxc2x7MOSFETs are arranged on the semiconductor integrated circuit. The pair of n-type SOIxc2x7MOSFETs have gates which respectively receive potentials 1 and 2, and a circuit for discriminating the magnitudes of the potentials 1 and 2 on the basis of the difference between the conductances of the pair of n-type SOIxc2x7MOSFETs is constituted, and the channel regions of the pair of SOIxc2x7MOSFETs are connected to each other by an impurity diffusion layer of the same conductivity type as that of the channel region described above.
According to arrangement 6 of the present invention, a semiconductor having a bandgap width smaller than that of the channel portion is used as a portion of the source region of the n-type SOIxc2x7MOSFET, and the pn diode using the junction between the p-type diffusion layer formed simultaneously with the portion of the source region of the SOIxc2x7MOSFET and consisting of the same material as that of the source region and the first n-type diffusion layer, and the pn diode using the junction between the p-type semiconductor having a bandgap width equal to that of the channel portion and the first n-type semiconductor are arranged. When the difference between the threshold values of these diodes is used as a reference potential, this reference potential is not easily changed by a change in temperature.
As described above, according to the present invention, in a sense amplifier constituted by SOIxc2x7MOSFETs, the substrate potentials of the SOIxc2x7MOSFETs can be made equal to each other, or the SOIxc2x7MOSFETs can be connected to a control line. For this reason, a substrate floating effect can be prevented, and an erroneous operation or the like caused by a change in threshold value can be prevented. In addition, high-density integration can be obtained with moderating design rules. Therefore, a high-density semiconductor device which has high reliability and effectively uses the advantages of the SOIxc2x7MOSFET can be realized.
Additional objects and advantages of the present invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the present invention. The objects and advantages of the present invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.